My Report

VLSI Practice Test 6


Correct Answer: 2 points | Wrong: -1 point
Grades: A* (100% score) | A (80%-99%) | B (60%-80%) | C (40%-60%) | D (0%-40%)
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1. All possible errors in mask layout can be eliminated after mask making proceeds.

2. Channel length modulation is for voltages

3. In D-algorithm, the discrepancy is driven to _____ and observed and thus detected.

4. Which is important during the design phase?

5. ______ of the area is dedicated for testability.

6. Cursor position is controlled using

7. 1 square Cg is ___________ of MOS transistor.

8. Input and output pads are made up of

9. The number of stages N is given by

10. Logic simulators can be replaced by simulators which operate at transistor level.


 

Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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