My Report

VLSI Mock Test 6


Correct Answer: 2 points | Wrong: -1 point
Grades: A* (100% score) | A (80%-99%) | B (60%-80%) | C (40%-60%) | D (0%-40%)
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 10%

Question 1 of 10

1. Bus wiring capacitance is driven through

Question 1 of 10

Question 2 of 10

2. Which pad contains Schmitt trigger circuitry?

Question 2 of 10

Question 3 of 10

3. The number of stages N is given by

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Question 4 of 10

4. D-algorithm is time intensive for large circuits.

Question 4 of 10

Question 5 of 10

5. Rifts and extensions should be placed in

Question 5 of 10

Question 6 of 10

6. The IN and OUT bus lines relative positions are interchanged to

Question 6 of 10

Question 7 of 10

7. Test pattern generation is assisted using

Question 7 of 10

Question 8 of 10

8. The circuit should be tested at

Question 8 of 10

Question 9 of 10

9. The nature of physical layout verification software depends on

Question 9 of 10

Question 10 of 10

10. _____ of faults are easier to detect.

Question 10 of 10


 

Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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