VHDL Practice Test 5

1. The correct syntax for using EXIT in a loop is ___________

loop_label WHEN condition EXIT

EXIT WHEN loop_label condition

EXIT loop_label WHEN condition;

EXIT WHEN condition loop_label;

2. How many types of severity levels are there for the ASSERT statement?

3. What does the next statement in loops do?

Skips the next line of the loop

Skips the current iteration

Exits the loop

Starts the next loop by ending the current

4. A wait statement can have label preceding it.

True

False

5. Which of the following can’t be used in a process when it has any WAIT statement?

Sensitivity list

CASE

LOOP

6. Which of the following is the default type of ports of an entity?

Signals

Functions

Variables

Constants

7. What kind of circuit is implemented by the following architecture?

ARCHITECTURE my_arch OF my_design IS
BEGIN
PROCESS
BEGIN
WAIT ON clk;
IF(clk = ‘1’) THEN
y <= x;
END IF;
END PROCESS;
END my_arch;

Shift register

OR gate

D flip flop

Inverter

8. Which of the following is correct syntax for WHILE LOOP?

   label: WHILE specification LOOP
    sequential_statements;
    END LOOP;

    label: WHILE condition LOOP
    sequential_statements;
    END LOOP label;

   label: WHILE LOOP specification IS
    sequential_statements;
    END LOOP;

    label: WHILE LOOP condition
    sequential_statements;
    END LOOP label;

9. What is the use of WHILE loop?

To repeat the statement until any condition holds true

To repeat statements inside until any condition is false

To repeat the statements for infinite time

To repeat the statement finite number of times

10. WAIT statement can’t appear under _______ directly.

Process

Subprogram

Architecture

Procedure