My Report

VHDL Mock Test 4


Correct Answer: 2 points | Wrong: -1 point
Grades: A* (100% score) | A (80%-99%) | B (60%-80%) | C (40%-60%) | D (0%-40%)
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 10%

Question 1 of 10

1. Which of the following statements can be seen as sequential equivalent to the selected concurrent assignment?

Question 1 of 10

Question 2 of 10

2. Which of the following statement can’t be used inside a process?

Question 2 of 10

Question 3 of 10

3. A postponed process runs when ___________

Question 3 of 10

Question 4 of 10

4. Inertial delay in Signal assignment is useful to ___________

Question 4 of 10

Question 5 of 10

5. Which of the following is correct syntax for process declaration?

Question 5 of 10

Question 6 of 10

6. In case any of the conditions is not covered by ‘cases’ in the case statement, which of the following keyword can be used to cover all those conditions?

Question 6 of 10

Question 7 of 10

7. For a signal used in sequential assignment, it can have _______ driver(s).

Question 7 of 10

Question 8 of 10

8. The driver(s) of signal y is _________

PROCESS ()
BEGIN
y <= ‘1’;
y <= x;
y <= z;
END PROCESS;

Question 8 of 10

Question 9 of 10

9. If no signal in the sensitivity list is changed, then how many times the process will be executed?

Question 9 of 10

Question 10 of 10

10. It is possible to use sensitivity list and wait statements in the same process.

Question 10 of 10


 

Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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