Digital Circuits Practice Test 4

1. The simplified expression of full adder carry is ____________

c = x+y+z

c = xy+xz

c = xy+xz+yz

c = xy+yz

2. Which of the following expressions is in the sum-of-products form?

(A * B)(C * D)

(A + B)(C + D)

A* B *(CD)

A * B + C * D

3. In most applications, transistor switches used in place of relays?

They consume less power

All of the Mentioned

They are quieter and smaller

They are faster

4. The binary subtraction of 0 – 0 = ?

Difference = 0, borrow = 0

Difference = 1, borrow = 1

Difference = 1, borrow = 0

Difference = 0, borrow = 1

5. A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is ____________

Ex-OR gate

OR gate

Ex-NOR gate

NAND gate

6. The number of logic gates and the way of their interconnections can be classified as ____________

Gate network

Logical network

Circuit network

System network

7. If the number of n selected input lines is equal to 2^m then it requires _____ select lines.

2ⁿ

8. The serial format for transmitting binary information uses __________

Multiple conductors

Infrared technology

A single conductor

Fiber-optic

9. One positive pulse with tw = 75 µs is applied to one of the inputs of an exclusive-OR circuit. A second positive pulse with tw = 15 µs is applied to the other input beginning 20 µs after the leading edge of the first pulse. Which statement describes the output's relation with the inputs?

The exclusive-OR output is a 15 s pulse followed by a 40 s pulse

The exclusive-OR output is a 20 s pulse followed by a 15 s pulse, with a separation of 40 s between the pulses

The exclusive-OR output is a 20 s pulse followed by a 40 s pulse, with a separation of 15 s between the pulses

The exclusive-OR output is a 20 s pulse followed by a 15 s pulse, followed by a 40 s pulse

10. The main disadvantage of Manchester carry chain is ___________

Both propagation delay and capacitive load

Propagation delay

Capacitive load

Ripple factor