Digital Circuits Mock Test 7

10%

Question 1 of 10

1. Binary counter that count incrementally and decrement is called ___________

Down counter

Up counter

Up-down counter

LSI counters

Question 1 of 10

Question 2 of 10

2. In 4-bit up-down counter, how many flip-flops are required?

Question 2 of 10

Question 3 of 10

3. Normally, the synchronous counter is designed using ____________

T flip-flops

J-K flip-flops

S-R flip-flops

D flip-flops

Question 3 of 10

Question 4 of 10

4. How many types of registers are?

Question 4 of 10

Question 5 of 10

5. For D flip-flop to JK flip-flop, the characteristics equation is given by ___________

D=JQ(p)'+Q(p)K'

D=JQ(p)'+KQ(p)'

D=JQ(p)+Q(p)K'

D=J'Q(p)+Q(p)K

Question 5 of 10

Question 6 of 10

6. How many different states does a 2-bit asynchronous counter have?

Question 6 of 10

Question 7 of 10

7. MOD-16 counter requires ________ no. of states.

Question 7 of 10

Question 8 of 10

8. A ripple counter's speed is limited by the propagation delay of ____________

Each flip-flop

The flip-flops only with gates

Only circuit gates

All flip-flops and gates

Question 8 of 10

Question 9 of 10

9. In a 3-bit asynchronous down counter, the initial content is ____________

010

000

111

101

Question 9 of 10

Question 10 of 10

10. What happens to the parallel output word in an asynchronous binary down counter whenever a clock pulse occurs?

The output word increases by 2

The output increases by 1

The output decreases by 1

The output word decreases by 2

Question 10 of 10