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Computer Fundamentals Mock Test 3


Correct Answer: 2 points | Wrong: -1 point
Grades: A* (100% score) | A (80%-99%) | B (60%-80%) | C (40%-60%) | D (0%-40%)
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 10%

Question 1 of 10

1. Cache Memory is implemented using the DRAM chips.

Question 1 of 10

Question 2 of 10

2. When logic gates are connected to form a gating/logic network it is called as a ______________ logic circuit.

Question 2 of 10

Question 3 of 10

3. The number of sign bits in a 32-bit IEEE format is ____

Question 3 of 10

Question 4 of 10

4. Which of the following is an efficient method of cache updating?

Question 4 of 10

Question 5 of 10

5. MAR stands for ___________

Question 5 of 10

Question 6 of 10

6. The universal gate that can be used to implement any Boolean expression is __________

Question 6 of 10

Question 7 of 10

7. Size of the ________ memory mainly depends on the size of the address bus.

Question 7 of 10

Question 8 of 10

8. The expression of a NAND gate is_______

Question 8 of 10

Question 9 of 10

9. Which of the following gate will give a 0 when both of its inputs are 1?

Question 9 of 10

Question 10 of 10

10. When the data at a location in cache is different from the data located in the main memory, the cache is called _____________

Question 10 of 10


 

Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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