Embedded System Practice Test 3

1. How do CBR works?

2. Which mode of operation selects an internal page of memory in the DRAM interfacing?

3. Which of the following is a plastic package used primarily for DRAM?

4. In which pin does the data appear in the basic DRAM interfacing?

5. Which shifting helps in finding the physical address in 8086?

6. Which of the following processors uses big endian representation?

7. How can we calculate the length of the refresh cycle?

8. Which cache memory solve the cache coherency problem?

9. Which mechanism splits the external memory storage into memory pages?

10. What are the basic elements required for cache operation?