Computer Organization and Architecture Online Test

1. The 8-bit encoding format used to store data in a computer is ______

2. The instruction, Add Loc,R1 in RTN is _______

3. SIMD stands for __________

4. The method which offers higher speeds of I/O transfers is ___________

5. The step where in the results stored in the temporary register is transferred into the permanent register is called as ______

6. When the process is returned after an interrupt service ______ should be loaded again.
i) Register contents
ii) Condition codes
iii) Stack contents
iv) Return addresses

7. The interrupt servicing mechanism in which the requesting device identifies itself to the processor to be serviced is ___________

8. The temporal aspect of the locality of reference means ________

9. The register used to serve as PC is called as ___________

10. _______ is used to store data in registers.

11. The digital information is stored on the hard disk by ____________

12. In IEEE 32-bit representations, the mantissa of the fraction is said to occupy ______ bits.

13. Once the BUS is granted to a device ___________

14. When we subtract -3 from 2 , the answer in 2's complement form is _________

15. The logic operations are simpler to implement using logic circuits.

16. ________ signal is used to show complete of memory operation.

17. The key feature of the RAMBUS tech is ________

18. The ______ is used to coordinate the operation of the multiplier.

19. ________ signal is asserted when the initiator wishes to send a message to the target.

20. To overcome the lag in the operating speeds of the I/O device and the processor we use ___________

21. The I/O devices form the _____ of the tree structure.

22. SCSI stands for ___________

23. The bits used to indicate the status of the page in the memory is called ______

24. In a SDRAM each row is refreshed every 64ms.

25. The primary function of the BUS is __________

26. The input and output of the registers are governed by __________

27. The main advantage of multiple bus organisation over a single bus is __________

28. The disadvantage of using a parallel mode of communication is ______

29. If the subroutine exceeds the private space allocated to it then the values are pushed onto _________

30. When parameters are being passed on to the subroutines they are stored in ________

31. The internal components of the processor are connected by _______

32. The transmission over the USB is divided into ____

33. EPIC stands for?

34. Which architecture is suitable for a wide range of data types?

35. User programmable terminals that combine VDT hardware with built-in microprocessor is _____

36. For a 3 BUS architecture, is the below code correct for adding three numbers?

PCout, R = B, Marin, READ, Inc PC
WMFC
MDRout, R = B, IRin
R4outa, R5outb, Select A, ADD, R6in, End

37. The device connected to the BUS are given addresses of ____ bit.

38. If we use the flash drives instead of the harddisks, then the secondary storage can go above primary memory in the hierarchy.

39. ARM processors where basically designed for _______

40. _____ is used to reset all the device controls to their startup state.

41. The main difference between the VLIW and the other approaches to improve performance is ___________

42. The cluster formation in which the work is divided equally among the systems is ______

43. The address system supported by ARM systems is/are ___________

44. The data is transferred over the RAMBUS as _______

45. What does the end instruction do?

46. In a general 8-bit parallel interface, the INTR line is connected to _______

47. The time between the receiver of an interrupt and its service is ______

48. The USB device follows _______ structure.

49. MFC stands for ___________

50. The multiplier -6(11010) is recorded as _______